The present invention relates to a microprocessor, and more specifically to a cache memory adapted to operate at high speeds in a one-chip microprocessor in which the cache memory is mounted on a chip.
A cache memory has heretofore been extensively known as a high-speed memory that is to be installed between a central processing unit (CPU) and a main memory. The cache memory usually has a capacity smaller than that of the main memory and its high-speed characteristics lend itself well for operating a computer at an increased speed. That is, the data having a high frequency of access by the CPU are transferred in advance from the main memory to the cache memory, in order to shorten the memory access time by the CPU.
The cache memory system has been widely used ranging from general-purpose computers to mini-computers. For example, a 32-bit microprocessor MC68020 disclosed in The Motorola MC68020 IEEE, Micro, August, 1984, pp. 101-118 has a cache memory on the chip. In the cache memory, data consisting of 32 bits corresponds to an address memory.
According to the above prior art, however, the address must be retrieved every time when the data consisting of 32 bits is accessed in order to determine whether the data is present in the cache memory or not. Therefore, when an attempt is made to access an external memory without referring to the cache memory, the time required for the address retrieval increases the overhead.
Another prior art related to the cache memory has been taught in Japanese Patent Laid-Open No. 214039/1986, according to which a row of a cache memory is constituted by a data part which consists of an address data of an associative part and a plurality of words with an external data bus width as a unit, and a flag (valid flag) is provided to indicate whether the data stored in the word is effective or not for each of the words in the data part. Since a data part consisting of a plurality of words corresponds to an address data, the area of an associative part can be reduced in the cache memory per a word of data stored therein. By using the flag, furthermore, the corresponding data only is written in case of a mishit, without increasing the overhead.